mirror of https://github.com/pwndbg/pwndbg.git
Replace pwnlib.asm.asm with pwndbg.lib.zig.asm (#3207)
* Replace pwnlib.asm.asm with pwndbg.lib.zig.asm * fix search * move unit-tests to ci * include pwnlib * fix test * fix docs * fix comment * fix import * fixypull/3217/head
patryk4815
4 months ago
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GitHub
parent
ca0b86d04c
commit
f9f90d9f02
@ -0,0 +1,26 @@
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from __future__ import annotations
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import pathlib
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from typing import List
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import pwnlib.context
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import pwnlib.data
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import pwndbg.aglib.arch
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import pwndbg.lib.zig
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def _get_pwntools_includes() -> List[pathlib.Path]:
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include = (
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pathlib.Path(pwnlib.data.path)
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/ "includes"
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/ str(pwnlib.context.context.os)
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/ f"{pwnlib.context.context.arch}.h"
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)
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if not include.exists():
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return []
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return [include]
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def asm(data: str) -> bytes:
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return pwndbg.lib.zig.asm(pwndbg.aglib.arch, data, includes=_get_pwntools_includes())
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@ -0,0 +1,206 @@
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from __future__ import annotations
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import pathlib
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import tempfile
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import pytest
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import unicorn as uc
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from unicorn import arm64_const
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from unicorn import arm_const
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from unicorn import mips_const
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from unicorn import ppc_const
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from unicorn import riscv_const
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from unicorn import s390x_const
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from unicorn import sparc_const
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from unicorn import x86_const
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import pwndbg.lib.zig
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expected_value = 60
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include_text = f"""
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#define FROM_INCLUDE_VALUE {expected_value}
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"""
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regs_and_instr = {
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"x86": (
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"mov eax, FROM_INCLUDE_VALUE",
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uc.UC_ARCH_X86,
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uc.UC_MODE_32,
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None,
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x86_const.UC_X86_REG_EAX,
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),
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"x86_64": (
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"mov rax, FROM_INCLUDE_VALUE",
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uc.UC_ARCH_X86,
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uc.UC_MODE_64,
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None,
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x86_const.UC_X86_REG_RAX,
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),
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"mips": (
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"li $a0, FROM_INCLUDE_VALUE",
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uc.UC_ARCH_MIPS,
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uc.UC_MODE_MIPS32 | uc.UC_MODE_BIG_ENDIAN,
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None,
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mips_const.UC_MIPS_REG_A0,
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),
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"mipsel": (
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"li $a0, FROM_INCLUDE_VALUE",
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uc.UC_ARCH_MIPS,
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uc.UC_MODE_MIPS32 | uc.UC_MODE_LITTLE_ENDIAN,
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None,
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mips_const.UC_MIPS_REG_A0,
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),
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"mips64": (
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"li $a0, FROM_INCLUDE_VALUE",
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uc.UC_ARCH_MIPS,
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uc.UC_MODE_MIPS64 | uc.UC_MODE_BIG_ENDIAN,
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None,
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mips_const.UC_MIPS_REG_A0,
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),
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"mips64el": (
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"li $a0, FROM_INCLUDE_VALUE",
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uc.UC_ARCH_MIPS,
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uc.UC_MODE_MIPS64 | uc.UC_MODE_LITTLE_ENDIAN,
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None,
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mips_const.UC_MIPS_REG_A0,
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),
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"arm": (
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"mov r0, #FROM_INCLUDE_VALUE",
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uc.UC_ARCH_ARM,
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uc.UC_MODE_ARM,
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None,
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arm_const.UC_ARM_REG_R0,
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),
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"armeb": (
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"mov r0, #FROM_INCLUDE_VALUE",
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uc.UC_ARCH_ARM,
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uc.UC_MODE_ARM | uc.UC_MODE_BIG_ENDIAN,
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None,
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arm_const.UC_ARM_REG_R0,
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),
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"thumb": (
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"mov r0, #FROM_INCLUDE_VALUE",
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uc.UC_ARCH_ARM,
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uc.UC_MODE_THUMB,
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None,
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arm_const.UC_ARM_REG_R0,
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),
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"thumbeb": (
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"mov r0, #FROM_INCLUDE_VALUE",
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uc.UC_ARCH_ARM,
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uc.UC_MODE_THUMB | uc.UC_MODE_BIG_ENDIAN,
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None,
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arm_const.UC_ARM_REG_R0,
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),
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"aarch64": (
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"mov x0, #FROM_INCLUDE_VALUE",
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uc.UC_ARCH_ARM64,
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uc.UC_MODE_ARM,
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None,
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arm64_const.UC_ARM64_REG_X0,
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),
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"aarch64_be": (
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"mov x0, #FROM_INCLUDE_VALUE",
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uc.UC_ARCH_ARM64,
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uc.UC_MODE_ARM | uc.UC_MODE_BIG_ENDIAN,
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None,
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arm64_const.UC_ARM64_REG_X0,
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),
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"riscv32": (
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"li a0, FROM_INCLUDE_VALUE",
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uc.UC_ARCH_RISCV,
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uc.UC_MODE_RISCV32,
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None,
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riscv_const.UC_RISCV_REG_A0,
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),
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"riscv64": (
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"li a0, FROM_INCLUDE_VALUE",
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uc.UC_ARCH_RISCV,
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uc.UC_MODE_RISCV64,
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None,
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riscv_const.UC_RISCV_REG_A0,
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),
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"s390x": (
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"lghi %r2, FROM_INCLUDE_VALUE",
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uc.UC_ARCH_S390X,
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uc.UC_MODE_BIG_ENDIAN,
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s390x_const.UC_CPU_S390X_Z14,
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s390x_const.UC_S390X_REG_R2,
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),
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# FIXME: upstream bug, https://github.com/ziglang/zig/issues/23674
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# 'sparc': ('mov 60,%i0', uc.UC_ARCH_SPARC, uc.UC_MODE_SPARC32 | uc.UC_MODE_BIG_ENDIAN, None, sparc_const.UC_SPARC_REG_I0),
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"sparc64": (
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"mov FROM_INCLUDE_VALUE,%i0",
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uc.UC_ARCH_SPARC,
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uc.UC_MODE_SPARC64 | uc.UC_MODE_BIG_ENDIAN,
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None,
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sparc_const.UC_SPARC_REG_I0,
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),
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"powerpc": (
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"li %r1, FROM_INCLUDE_VALUE",
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uc.UC_ARCH_PPC,
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uc.UC_MODE_32 | uc.UC_MODE_BIG_ENDIAN,
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ppc_const.UC_CPU_PPC32_7457A_V1_2,
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ppc_const.UC_PPC_REG_1,
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),
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"powerpc64": (
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"li %r1, FROM_INCLUDE_VALUE",
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uc.UC_ARCH_PPC,
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uc.UC_MODE_64 | uc.UC_MODE_BIG_ENDIAN,
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ppc_const.UC_CPU_PPC64_970_V2_2,
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ppc_const.UC_PPC_REG_1,
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),
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"powerpcle": (
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"li %r1, FROM_INCLUDE_VALUE",
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None,
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None,
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None,
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None,
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), # FIXME: UC_MODE_LITTLE_ENDIAN, Not supported by Unicorn
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"powerpc64le": (
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"li %r1, FROM_INCLUDE_VALUE",
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None,
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None,
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None,
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None,
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), # FIXME: UC_MODE_LITTLE_ENDIAN, Not supported by Unicorn
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"loongarch64": (
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"addi.d $r1, $r1, FROM_INCLUDE_VALUE",
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None,
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None,
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None,
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None,
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), # FIXME: Not supported by Unicorn
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}
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test_cases = list(regs_and_instr.keys())
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@pytest.mark.parametrize("arch", test_cases)
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def test_zig_asm_compiles(arch):
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asm_line, uc_arch, uc_mode, uc_cpu, reg_id = regs_and_instr[arch]
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with tempfile.NamedTemporaryFile(mode="wt", suffix="test.h", delete=False) as example_h:
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example_h.write(include_text)
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bytecode = pwndbg.lib.zig._asm(arch, asm_line, includes=[pathlib.Path(example_h.name)])
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assert len(bytecode) > 0, "Bytecode too short"
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if uc_arch is None:
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pytest.skip("unsupported by Unicorn")
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mu = uc.Uc(uc_arch, uc_mode, uc_cpu)
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# Map 4KB memory at 0x20000
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ADDRESS = 0x20000
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mu.mem_map(ADDRESS, 0x2000)
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mu.mem_write(ADDRESS, bytes(bytecode))
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# Zero the register
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mu.reg_write(reg_id, 0)
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# Run the code
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mu.emu_start(ADDRESS, ADDRESS + len(bytecode), count=1)
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# Read result
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value = mu.reg_read(reg_id)
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assert value == expected_value, "Value mismatch"
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