* _generate_load_annotator
* Parent class function for load-instruction annotations. RISCV loads implemented and tested. SPARC load/store instructions noted
* Get ARM32 load and store instructions
* Add all AArch64 loads and stores
* MIPS memory address resolver
* AArch64 memory resolver
* AArch64 shift operation in memory operands
* Arm resolve memory operands and PC special case
* Lint
* comment
* rebase and lint
* comment corrections
* Fill in arm function maps
* extract mips load instructions
* lint
* Remove unnecessary parameter to enhancement telescope function
* Implement signed loads
* Now with load code moved to parent, refactor in x86 class
* lint
* aarch64 read size fix
* arm thumb mode pc + 4
* read thumb bit from emu when needed
* lint
* rebase
* lint
* rebase
* Add load annotator to MIPS
* lint
* fix last aarch64 register thing
* minor fixes
* Implement bitwise math rotation operations on numbers of discrete width. Will be used in manually evaluating arm instruction offsets and shifts
* fixes
* Move syscall number evaluation into instruction.py. This allows us to determine and display future syscalls
* Move string manipulation to color.disasm.py
* lint
* fix padding
* Fix x86 syscall
* comment
* disable debug mode
* Fix a test - we now remember previous syscalls as well
* Move x86 specific syscall logic to the x86 subclass
* lint
* @override decorator added to methods
* comments
* lint
* add test with emulation disabled for syscall annotation
* Fix x86/x86_64 edge cases with syscall register reading, and add test for emulation off for syscalls
* Update an outdated comment
* Tests depend on width of context banner
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Co-authored-by: Disconnect3d <dominik.b.czarnota@gmail.com>
OBarronCS
Matt