|
|
|
|
@ -598,7 +598,7 @@ armcm = RegisterSet(
|
|
|
|
|
|
|
|
|
|
# AArch64 has a PSTATE register, but GDB represents it as the CPSR register
|
|
|
|
|
aarch64 = RegisterSet(
|
|
|
|
|
retaddr=(Reg("lr", 8),),
|
|
|
|
|
retaddr=(Reg("lr", 8),), # x30
|
|
|
|
|
flags={"cpsr": aarch64_cpsr_flags},
|
|
|
|
|
extra_flags={
|
|
|
|
|
"scr_el3": aarch64_scr_flags,
|
|
|
|
|
@ -612,11 +612,7 @@ aarch64 = RegisterSet(
|
|
|
|
|
"ttbr0_el1": BitFlags(),
|
|
|
|
|
"ttbr1_el1": BitFlags(),
|
|
|
|
|
},
|
|
|
|
|
# X29 is the frame pointer register (FP) but setting it
|
|
|
|
|
# as frame here messes up the register order to the point
|
|
|
|
|
# it's confusing. Think about improving this if frame
|
|
|
|
|
# pointer semantics are required for other functionalities.
|
|
|
|
|
# frame = 'x29',
|
|
|
|
|
frame=Reg("fp", 8, subregisters=(Reg("w29", 4, zero_extend_writes=True),)), # x29
|
|
|
|
|
gpr=(
|
|
|
|
|
Reg("x0", 8, subregisters=(Reg("w0", 4, zero_extend_writes=True),)),
|
|
|
|
|
Reg("x1", 8, subregisters=(Reg("w1", 4, zero_extend_writes=True),)),
|
|
|
|
|
@ -647,7 +643,7 @@ aarch64 = RegisterSet(
|
|
|
|
|
Reg("x26", 8, subregisters=(Reg("w26", 4, zero_extend_writes=True),)),
|
|
|
|
|
Reg("x27", 8, subregisters=(Reg("w27", 4, zero_extend_writes=True),)),
|
|
|
|
|
Reg("x28", 8, subregisters=(Reg("w28", 4, zero_extend_writes=True),)),
|
|
|
|
|
Reg("x29", 8, subregisters=(Reg("w29", 4, zero_extend_writes=True),)),
|
|
|
|
|
# Note: x29 is FP (frame) and x30 is LR (retaddr) register
|
|
|
|
|
),
|
|
|
|
|
args=("x0", "x1", "x2", "x3"),
|
|
|
|
|
retval="x0",
|
|
|
|
|
|