Lint files that inconsistently get linted (#3376)

pull/3377/head
OBarronCS 1 month ago committed by GitHub
parent 0608aba8d2
commit c8042c554b
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GPG Key ID: B5690EEEBB952194

@ -101,7 +101,7 @@ class Kconfig(UserDict): # type: ignore[type-arg]
@property
def CONFIG_SLUB_TINY(self) -> bool:
krelease = pwndbg.aglib.kernel.krelease()
if krelease is not None and krelease < (6, 2): # config added after v6.2
if krelease is not None and krelease < (6, 2): # config added after v6.2
return False
return pwndbg.aglib.symbol.lookup_symbol("deactivate_slab") is None

@ -29,7 +29,9 @@ def round_up(address: int, align: int) -> int:
return (address + (align - 1)) & (~(align - 1))
def format_address(vaddr: int, memsz: int, permstr: str, offset: int, objfile: str | None = None) -> str:
def format_address(
vaddr: int, memsz: int, permstr: str, offset: int, objfile: str | None = None
) -> str:
"Format the given address as a string."
width = 2 + 2 * pwndbg.aglib.arch.ptrsize
@ -85,7 +87,15 @@ class Page:
to us at all times, and having an easy way to filter them out is helpful..
"""
def __init__(self, start: int, size: int, flags: int, offset: int, objfile: str = "", in_darwin_shared_cache: bool = False) -> None:
def __init__(
self,
start: int,
size: int,
flags: int,
offset: int,
objfile: str = "",
in_darwin_shared_cache: bool = False,
) -> None:
self.vaddr = start
self.memsz = size
self.flags = flags

@ -26,8 +26,8 @@ The assembly instruction operands come from capstone, and are thus
not controlled by this setting. For consistency with them, leave
this setting at 9 (the default).
""",
# We could look into also overwriting the capstone operands string, similarly
# to what is done here: https://github.com/pwndbg/pwndbg/blob/26db4533aa08d77c4bbc359b4760a0944e0c6b23/pwndbg/aglib/disasm/arch.py#L322-L331
# We could look into also overwriting the capstone operands string, similarly
# to what is done here: https://github.com/pwndbg/pwndbg/blob/26db4533aa08d77c4bbc359b4760a0944e0c6b23/pwndbg/aglib/disasm/arch.py#L322-L331
)
@ -73,7 +73,7 @@ config_property_name_color = theme.add_color_param(
"color used to highlight the name in name-value pairs",
help_docstring="""
Used heavily in mallocng commands.
"""
""",
)
config_property_value_color = theme.add_color_param(
@ -82,7 +82,7 @@ config_property_value_color = theme.add_color_param(
"color used to highlight the value in name-value pairs",
help_docstring="""
Used heavily in mallocng commands.
"""
""",
)
config_property_title_color = theme.add_color_param(
@ -91,7 +91,7 @@ config_property_title_color = theme.add_color_param(
"color used to highlight the title of name-value pair groups",
help_docstring="""
Used heavily in mallocng commands.
"""
""",
)
@ -194,14 +194,16 @@ def from_properties(
prop.alt_value = f"{prop.alt_value:#x}" if prop.use_hex else f"{prop.alt_value}"
indentation_str = indent_size * " "
extra_list_pad_str = (
indentation_str + value_offset * " " + " " + extra_offset * " "
)
extra_list_pad_str = indentation_str + value_offset * " " + " " + extra_offset * " "
for prop in properties:
# The property may override the generic color functions.
prop_name_cfunc = prop.name_color_func if prop.name_color_func is not None else name_color_func
prop_value_cfunc = prop.value_color_func if prop.value_color_func is not None else value_color_func
prop_name_cfunc = (
prop.name_color_func if prop.name_color_func is not None else name_color_func
)
prop_value_cfunc = (
prop.value_color_func if prop.value_color_func is not None else value_color_func
)
text += (
indentation_str

@ -600,7 +600,7 @@ armcm = RegisterSet(
# AArch64 has a PSTATE register, but GDB represents it as the CPSR register
aarch64 = RegisterSet(
retaddr=(Reg("lr", 8),), # x30
retaddr=(Reg("lr", 8),), # x30
flags={"cpsr": aarch64_cpsr_flags},
extra_flags={
"scr_el3": aarch64_scr_flags,
@ -615,7 +615,7 @@ aarch64 = RegisterSet(
"ttbr0_el1": BitFlags(),
"ttbr1_el1": BitFlags(),
},
frame=Reg("fp", 8, subregisters=(Reg("w29", 4, zero_extend_writes=True),)), # x29
frame=Reg("fp", 8, subregisters=(Reg("w29", 4, zero_extend_writes=True),)), # x29
gpr=(
Reg("x0", 8, subregisters=(Reg("w0", 4, zero_extend_writes=True),)),
Reg("x1", 8, subregisters=(Reg("w1", 4, zero_extend_writes=True),)),

@ -14,7 +14,9 @@ from pwndbg.lib.arch import ArchDefinition
from pwndbg.lib.arch import Platform
# Supported architectures can be obtained using the command: `zig targets`
_arch_mapping: Dict[Tuple[PWNDBG_SUPPORTED_ARCHITECTURES_TYPE, Literal["little", "big"], int], str] = {
_arch_mapping: Dict[
Tuple[PWNDBG_SUPPORTED_ARCHITECTURES_TYPE, Literal["little", "big"], int], str
] = {
("x86-64", "little", 8): "x86_64",
("i386", "little", 4): "x86",
("mips", "big", 4): "mips",
@ -44,7 +46,6 @@ _asm_header: Dict[str, str] = {
# `.intel_syntax noprefix` forces the use of Intel assembly syntax instead of AT&T
"x86_64": _prefix_header + ".intel_syntax noprefix\n",
"x86": _prefix_header + ".intel_syntax noprefix\n",
# `.set noreorder` disables instruction reordering for MIPS to handle delay slots correctly
"mips": _prefix_header + ".set noreorder\n",
"mipsel": _prefix_header + ".set noreorder\n",
@ -52,7 +53,6 @@ _asm_header: Dict[str, str] = {
"mips64el": _prefix_header + ".set noreorder\n",
"aarch64": _prefix_header,
"aarch64_be": _prefix_header,
# `.syntax unified` enables the unified assembly syntax for ARM/Thumb
"arm": _prefix_header + ".syntax unified\n",
"armeb": _prefix_header + ".syntax unified\n",
@ -70,6 +70,7 @@ _asm_header: Dict[str, str] = {
"s390x": _prefix_header,
}
def _get_zig_target(arch: ArchDefinition) -> str | None:
if arch.platform == Platform.LINUX:
# "gnu", "gnuabin32", "gnuabi64", "gnueabi", "gnueabihf",
@ -96,7 +97,9 @@ def flags(arch: ArchDefinition) -> List[str]:
zig_target = _get_zig_target(arch)
if zig_target is None:
raise ValueError(f"Can't find ziglang target for ({(arch.name, arch.endian, arch.ptrsize)})")
raise ValueError(
f"Can't find ziglang target for ({(arch.name, arch.endian, arch.ptrsize)})"
)
return [
os.path.join(os.path.dirname(ziglang.__file__), "zig"),
@ -106,15 +109,17 @@ def flags(arch: ArchDefinition) -> List[str]:
]
def asm(arch: ArchDefinition, data: str, includes: List[pathlib.Path] | None=None) -> bytes:
def asm(arch: ArchDefinition, data: str, includes: List[pathlib.Path] | None = None) -> bytes:
arch_mapping = _arch_mapping.get((arch.name, arch.endian, arch.ptrsize), None)
if arch_mapping is None:
raise ValueError(f"Can't find ziglang target for ({(arch.name, arch.endian, arch.ptrsize)})")
raise ValueError(
f"Can't find ziglang target for ({(arch.name, arch.endian, arch.ptrsize)})"
)
return _asm(arch_mapping, data, includes)
def _asm(arch_mapping: str, data: str, includes: List[pathlib.Path] | None=None) -> bytes:
def _asm(arch_mapping: str, data: str, includes: List[pathlib.Path] | None = None) -> bytes:
try:
import ziglang
except ImportError:
@ -127,8 +132,8 @@ def _asm(arch_mapping: str, data: str, includes: List[pathlib.Path] | None=None)
if includes is None:
includes = []
includes = ''.join((f'#include "{path}"\n' for path in includes))
target = f'{arch_mapping}-freestanding'
includes = "".join((f'#include "{path}"\n' for path in includes))
target = f"{arch_mapping}-freestanding"
with tempfile.TemporaryDirectory() as tmpdir:
asm_file = os.path.join(tmpdir, "input.S")
@ -176,7 +181,9 @@ def _asm(arch_mapping: str, data: str, includes: List[pathlib.Path] | None=None)
universal_newlines=True,
)
if objcopy_process.returncode != 0:
raise Exception("Extracting bytecode error", objcopy_process.stdout, objcopy_process.stderr)
raise Exception(
"Extracting bytecode error", objcopy_process.stdout, objcopy_process.stderr
)
with open(bytecode_file, "rb") as f:
return f.read()

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