From 956692cfd6cbc95f11878d70bb3ccb49a43a4714 Mon Sep 17 00:00:00 2001 From: OBarronCS <55004530+OBarronCS@users.noreply.github.com> Date: Wed, 9 Oct 2024 02:51:53 -0700 Subject: [PATCH] Fix issue #2463 (#2464) --- pwndbg/aglib/disasm/x86.py | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/pwndbg/aglib/disasm/x86.py b/pwndbg/aglib/disasm/x86.py index 38dd9ad78..f9ca9b89e 100644 --- a/pwndbg/aglib/disasm/x86.py +++ b/pwndbg/aglib/disasm/x86.py @@ -270,21 +270,22 @@ class DisassemblyAssistant(pwndbg.aglib.disasm.arch.DisassemblyAssistant): # Get memory address (Ex: lea rax, [rip + 0xd55], this would return $rip+0xd55. Does not dereference) if op.mem.segment != 0: if op.mem.segment == X86_REG_FS: - if (base := pwndbg.aglib.regs.fsbase) is None: + if (seg_base := pwndbg.aglib.regs.fsbase) is None: return None elif op.mem.segment == X86_REG_GS: - if (base := pwndbg.aglib.regs.gsbase) is None: + if (seg_base := pwndbg.aglib.regs.gsbase) is None: return None else: return None + else: + seg_base = 0 - # Both a segment and base cannot be in use - elif op.mem.base != 0: - base = self._read_register(instruction, op.mem.base, emu) - if base is None: + if op.mem.base != 0: + mem_base = self._read_register(instruction, op.mem.base, emu) + if mem_base is None: return None else: - base = 0 + mem_base = 0 if op.mem.index != 0: index = self._read_register(instruction, op.mem.index, emu) @@ -295,7 +296,7 @@ class DisassemblyAssistant(pwndbg.aglib.disasm.arch.DisassemblyAssistant): else: scale = 0 - return base + op.mem.disp + scale + return seg_base + mem_base + op.mem.disp + scale @override def _resolve_target(self, instruction: PwndbgInstruction, emu: Emulator | None):