Emulator Arm SP register fix (#2337)

* new register list to extract flags

* lint

* lint2

* list order

* remove stale comment

* fix

* disable debug mode...

* Fix with specific register ordering

* Add reference to pr

* remove debug statement

* cache order on registerset

* lint

* list -> List
pull/2347/head
OBarronCS 1 year ago committed by GitHub
parent 117a68b7f2
commit 31292dff74
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GPG Key ID: B5690EEEBB952194

@ -221,11 +221,7 @@ class Emulator:
self.last_single_step_result = InstructionExecutedResult(None, None)
# Initialize the register state
for reg in (
list(self.regs.retaddr)
+ list(self.regs.misc)
+ list(self.regs.common) # this includes the flags register
):
for reg in self.regs.emulated_regs_order:
enum = self.get_reg_enum(reg)
if not reg:

@ -80,6 +80,17 @@ class RegisterSet:
if reg and reg not in self.common:
self.common.append(reg)
# The specific order of this list is very important:
# Due to the behavior of Arm in the Unicorn engine,
# we must write the flags register after PC, and the stack pointer after the flags register.
# Otherwise, the values will be clobbered
# https://github.com/pwndbg/pwndbg/pull/2337
self.emulated_regs_order: List[str] = []
for reg in [pc] + list(flags) + [stack, frame] + list(retaddr) + list(misc) + list(gpr):
if reg and reg not in self.emulated_regs_order:
self.emulated_regs_order.append(reg)
self.all = set(misc) | set(flags) | set(extra_flags) | set(self.retaddr) | set(self.common)
self.all -= {None}

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